Address:	41 Stanley Street South, Bedminster, Bristol BS3 3PG, UK
Phone:	+44 781 3670031
Email:	jamie@shareable.org
Web:	www.shareable.org
D.O.B.:	22 August 1972

British nationality, and have a clean driving license.
Recently completed one-day First Aid training.

I enjoy solving difficult technical problems, and helping others to do the same.  I am friendly, get on well with others, a good communicator and naturally supportive.  I can work alone or as part of a team, and am used to a multi-national and multi-cultural environment.  I like to learn, to teach, and I appreciate variety.

I have over 19 years of diverse computing and engineering experience.  I've designed medical image scanners, hardware compilers, video games and high-speed network devices, and also worked in network administration.

2002-present:

Self Employed Engineering Consultant, Bristol.

Presently I am happily self-employed.  I work on a diverse range of projects and part-time jobs, technical and non-technical.  Recent technical projects include FPGA-based electronic image analysis for contact lens measurement, an encryption toolkit in Java, and several web sites.  I also manage network hosting (web sites, email and other services) for several people, and develop quite a lot of free software.

2001-2002:

Senior Firmware Engineer. Degree2 Innovations Ltd., Bristol.

I wrote special drivers to maximise performance of network I/O on embedded PCs while introducing precision delays; then I calibrated them using a hardware tester I designed at CERN.

I was involved in the design of novel algorithms to support Quality of Service (QoS) in a large scale network, including packet conditioning at a single node and end to end calculations.  For this I wrote a flexible network component simulator, which is still in use, to research the effect of QoS algorithms.

1998-2000:

Network Technology Researcher, Hardware and Software. CERN - European Organization for Nuclear Research, Geneva. Celoxica, Abingdon.

Working on a testing framework for large Ethernet networks, I designed 100Mbit/s custom hardware based on FPGAs, and firmware for optical 1Gb/s Alteon cards.  Also PCI-based cards with IEEE1355 DS-links and HS-links.

My role spanned many levels: electronics, FPGA firmware, embedded processors, compiler modifications, many Linux device drivers, remote clients & servers, diagnostic tools, and GUIs.

I was responsible for technical direction of our team, design and programming.  Part of each day was spent talking with colleagues to resolve technical problems and assign tasks.  The rest was spent programming or diagnosing hardware faults.

Our custom hardware will be used to demonstrate viability of a 2500 node high-speed data processing cluster for ATLAS, a high-energy physics experiment beginning at CERN in 2005 when the Large Hadron Collider (LHC) is ready.

For Celoxica I wrote tools to combine VHDL and Handel-C (hardware design languages) to develop high-speed FPGA designs, documented over 100 bugs in Handel-C's prereleases, and ensured all critical bugs were fixed prior to its commercial release.

1994-1997:

Network Manager & Video Games Programmer. Rebellion Developments Ltd., Oxford.

As games programmer, I developed tools for image processing, compression, build & configuration management, automatic data processing, and manipulating large archives (several gigabytes in more than a hundred thousand files, which was a lot in 1997).

I wrote 3D game engines for the Atari Jaguar, FM Towns and PC (MS-DOS & Linux), for several games and most of Rebellion's promotional material.  I was responsible for: overall technical design, geometry, rendering, collisions, physical modelling, sound, AI scheduling, networking, device drivers, resource management, compiler tools, source code generators, data preparation and version control (amongst other things).

I also maintained a network of about 60 machines: MS-DOS, various Windows, Mac, Unix and Linux, all interoperating.  File sharing with NFS, Samba and Appletalk; internet access with secure firewalls over ISDN.

1993 & 1994:

Hardware Compiler Programmer. Programming Research Group, Oxford University.

I designed program transformation, logic optimisation and circuit checking passes for the Handel to FPGA hardware compiler, written in ML.  Wrote a fast circuit simulator and did general program maintenance.

Handel was the basis for Handel-C and DK1, now marketed by Celoxica.  (See 1998-2000 above).

1992:

Medical Imaging Engineer. Stoke Mandeville Hospital, Aylesbury.

I built and calibrated a laser-video human cranio-facial scanner.  I also designed the software to control it, gather data and convert it into a 3d form for use with volumetric image processing software.  Did some manipulation of CAT and MRI head images, and combining of these with scanned surface data.

During subsequent years I have been involved in the design of a calibration jig, maths and software, and I am listed as co-author of two papers about the work.  (Craniofacial Society 1993, IEE 1998).

Earlier:

Satellite image compression; sales; accounting; shop management; DTP & database programming.

People: Supervisory experience managing a team with different skill-sets, and talking with management about people and technical issues.  I prefer to set direction by example and working alongside the team, rather than dictating.  I had good feedback from mentoring programs at my former employer.

Networks: System/network administrator (3 years officially): Ran a mixed network of MS-DOS, Windows 3.11/95/NT, Mac, Linux and IRIX.  I am intimately familiar with networking protocols such as TCP/IP, DNS, HTTP, SMTP, SSH, Samba, and tunnels.  I have good understanding of security and cryptography as it applies to networks, and have strong fault diagnosis and repair skills.

Programming Languages: Extensive experience with C (12 years), C++ (7 years), Perl, Java, Lisp, ML, Haskell, Awk, Make, Bourne Shell, Lex, Yacc, and assembly language (19 years: i386, MIPS, ARM, SPARC, 68000, 6502, Z80).  Hardware design languages: Handel-C (3 years), DK1, AHDL, EDIF and VHDL.  I am fluent in a broad range of language types: imperative, functional, parallel, database and hardware-oriented, and learn new languages quickly.

Unix: 12 years.  Mostly Linux but also SunOS, Solaris, IRIX, Ultrix and FreeBSD.  Extensive experience programming Linux at all levels, kernel and userspace.  Thoroughly familiar with system administration of Linux, including remote administration and security aspects.

Platforms: I've ported applications to a wide range of Unix platforms and to Windows.  I've written applications, tools, games and device drivers for BBCs, Torches, Spectrums, Ataris, Amigas, Archimedes, Sun Workstations, Jaguars, FM Towns, Intel PCs running MS-DOS, Windows 95/98/NT, Linux, and other Unix variants.  I've indirect experience of PlayStations and Saturns (tools development).

Compilers: Worked on cross-compilers, assemblers, debuggers, simulators and source code generators.  I improved GNU C++ to generate faster code for a commercial game, and wrote a new GCC machine description to generate better code on the Alteon Gigabit Ethernet processor.  I developed new optimisation and simulation techniques in the Handel hardware compiler.

Open Source / Free Software: I've contributed to the Linux kernel since 1994, authored Emacs packages including Folding mode, contributed to GCC including a new machine description for the Alteon MIPS variant, and many other less well known software projects.  Currently I am writing a software modem, a decompiler and a secure shell client in Java.

Activities: Cycling, gardening, travelling around Europe to see friends.

Health: Ergonomics, nutrition, energy medicine and massage.  I am a registered professional massage therapist, and have recently begun to study acupuncture.

Free software: Much of my time is spent writing Free (or Open Source) software.  (See the Experience section above).

Private research: I study dynamic optimisation, supercompilers, virtual machines and advanced program analysis techniques.  This is to support an even longer term interest in computational physics.

Mansfield College, Oxford University:
1990-1994:	BA/M.Eng (Hons) in Engineering and Computing Science, 2:1.  This is a four year Masters degree in Engineering Science and Computer Science.  Awarded a £200 prize for "best part II project".  This was for developing a new geometric collision detection algorithm, to run on a chip.
Ysgol-y-Creuddyn, Bae Penrhyn, Gwynedd:
'A' Levels:	Mathematics--Statistics & Mechanics (A); Physics (A); Mathematics--Pure & Further Pure (A); Chemistry (C).
'O' Levels:	Mathematics (A); Additional Mathematics (A).
GCSEs:	English; English Literature; Welsh; Welsh Literature; Physics; Chemistry; Biology; Economics; Art & Design.

"Laser Imaging and Image Reconstruction: Their Application in Craniofacial Morphanalysis", N. D. Duffy, G. P. Rabey, J. Lokier, R. N. Bodley, Craniofacial Society of Great Britain, 1993.

"Laser-video scanner calibration without the use of a frame store", B. Tiddeman, N. Duffy, G. Rabey, J. Lokier. Vision, Image and Signal Processing, IEE Proceedings, Vol. 145, August 1998.

"Building custom processors with Handel-C", Abstract 122, J. Lokier, IEEE Real Time '99 Conference, Santa Fe (New Mexico, USA) 1999.

"Testing and Modeling Ethernet Switches and Networks for Use in ATLAS High-level Triggers", R. W. Dobinson, S. Haas, K. Korcyl, M. J. LeVine, J. Lokier, B. Martin, C. Meirosu, F. Saka, K. Vella; ATLAS publication, CERN, November 2000.

"A Fast Ethernet Tester Using FPGAs and Handel-C", R. Beuran, R. W. Dobinson, S. Haas, M. J. LeVine, X. Liu, J. Lokier, B. Martin, C. Meirosu. Celoxica user's conference, April 2001.

"Testing Ethernet Networks for the ATLAS Data Collection System", F. R. M. Barnes, R. Beuran, R. W. Dobinson, M. J. LeVine, B. Martin, J. Lokier, and C. Meirosu, IEEE Trans. Nuclear Science 49, No. 2, p. 516, April 2002 (also CERN ATLAS note ATL-DAQ-2002-009).